The 74HC280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8)is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH .Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
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The 74HC280 is a 9-bit parity generator or checker. Both even and odd parity outputs are available. The even parity output (PE) is HIGH when an even number of data inputs (I0 to I8)is HIGH. The odd parity output (PO) is HIGH when an odd number of data inputs are HIGH .Expansion to larger word sizes is accomplished by tying the even outputs (PE) of up to nine parallel devices to the final stage data inputs. Inputs include clamp diodes. It enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
| Parameter | Min | Max | Unit |
| Supply Voltage (VCC) | -0.5 | +7 | V |
| input clamping current |
0 | +20 | ma |
| ambient temperature |
-40 | +125 | ?C |
| Input Rise or Fall Times | 0 | 625 |
ns/V |
| total power dissipation |
500 | mW | |
| output current | +25 | mA | |
| supply current | 50 | MA |
Operating voltage | 2.5 3.0V |
Pixel Resolution | 0.3MP |
Photosensitive array | 640 x 480 |
Optical Size | 1.6 inch |
Angel of view | 67 degrees |
Maximum Frame Rate | 30fps VGA |
Sensitivity | 1.3V/(Lux-sec) |
Dormancy | Less than 20A |
Power consumption | 60mW/15fpsVGA YUV |
Temperature operation Range | -30 C ~ 70 C |
Pixel area | 3.6 x 3.6 m |
Signal to noise ratio (SNR) | 46 dB |
Dynamic range | 52 dB |
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