Showing 253–264 of 700 results
74LS20 IC – (SMD Package) – Dual 4-input NAND Gate IC (7420 IC)
74LS21 IC – (SMD Package) – Dual 4-input AND Gate IC (7421 IC)
74LS240 IC – (SMD Package) – Octal Buffers & Line Drivers IC (74240 IC)
74LS240 Octal Buffers Line Drivers IC (74240) DIP-20 Package
74LS243 3-State Quad Bus Transceiver IC (74243) DIP-14 Package
74LS243 IC – (SMD Package) 3-State Quad Bus Transceiver IC (74243 IC)
74LS244 IC – (SMD Package) – Octal Buffer/Line Driver with Tri-State Output IC (74244 IC)
The 74LS244 buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fan out outputs and can be used to drive terminated lines down to 133?.
74LS244 Octal 3-State Buffer/Line Driver IC (74244 IC) DIP-20 Package
The 74LS244 buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mV of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fan out outputs and can be used to drive terminated lines down to 133?.
74LS245 3-State Octal Bus Transceiver IC (74245 IC) DIP-20 Package
The 74LS245 octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.
74LS245 IC – (SMD Package) – Octal Bus Transceiver IC (74245 IC)
The 74LS245 SMD is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input (DR) controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used to isolate the buses. The following are the features:-
74LS253 3-State Dual 4-Input Multiplexer IC (74253) DIP-16 Package
Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The 3-STATE outputs can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enabled output will drive the bus line to a HIGH or LOW logic level.
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