Electronic Components

The UA741 is a high performance monolithic operational amplifier constructed on a single silicon chip. It is intended for a wide range of analog applications. The high gain and wide range of operating voltages provide superior performances in integrator, summing amplifiers and general feedback applications. The internal compensation network (6 dB/octave) ensures stability in closed loop circuits.   

The 7414 Hex Schmitt-Trigger Inverters circuit in 7414 functions as an inverter. However, they have different input threshold levels for positive-going (VT+) and negative-going (VT? ) signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals.

The 74595 consists of an 8?bit shift register and an 8?bit D?type latch with three?state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8?bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register. The 74595 directly interfaces with the SPI serial data port on CMOS MPUs and MCUs. 

The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are edge-triggered inputs which control the state changes of the flip-flops as described in the function table. Clock triggering occurs at a voltage level and is not directly related to the transition time of the positive-going pulse. The J and K inputs must be stable just one setup time prior to the low-to-high transition of the clock for predictable operation. The JK design allows operation as a D flip-flop by tying J and K inputs together. Although the clock input is level sensitive, the positive transition of the clock pulse between the 0.8V and 2.0V levels should be equal to or less than the clock to output delay time for reliable operation