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74LS298 Quad 2-Input Multiplexer IC (74298) DIP-16 Package

53.10
The 74LS298 is a Quad 2-Port Register. It is the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register. A Common Select input selects between two 4-bit input ports (data sources.) The selected data is transferred to the output register synchronous with the HIGH to LOW transition of the 

74LS299 8-Input Universal Shift/Storage Register IC (74299) DIP-20 Package

41.30
The 74LS299 is an 8-bit universal shift/storage register with 3-STATE outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Separate outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. A separate active LOW Master Reset is used to reset the register

74LS299 IC – (SMD Package) 8-Input Universal Shift/Storage Register IC (74299 IC)

64.90
The 74LS299 is an 8-bit universal shift/storage register with 3-STATE outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Separate outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. A separate active LOW Master Reset is used to reset the register

74LS31 Hex Delay Line Generator IC (7431) DIP-16 Package

29.50
These LS31 delay elements are intended to provide well-defined delays across both temperature and VCC ranges. Used in cascade, a limitless range of delay gating is possible. All inputs are PNP with IL MAX of -0.2 mA. Gates 1, 2, 5, and 6 have standard Low-Power Schottky output sink current capability of 4 and 8 mA IOL Buffers 3 and 4 are rated at 12 and 24 mA. The 74LS31 is characterized for operation from 0?C to 70?C

74LS31 IC – (SMD Package) Hex Delay Line Generator IC (7431 IC)

29.50
These LS31 delay elements are intended to provide well-defined delays across both temperature and VCC ranges. Used in cascade, a limitless range of delay gating is possible. All inputs are PNP with IL MAX of -0.2 mA. Gates 1, 2, 5, and 6 have standard Low-Power Schottky output sink current capability of 4 and 8 mA IOL Buffers 3 and 4 are rated at 12 and 24 mA. The 74LS31 is characterized for operation from 0?C to 70?C

74LS32 Quad 2-Input OR Gate IC (7432 IC) DIP-14 Package

22.42
The 74LS32 is a 14 Pin Quad 2-Input OR Gate IC. The 74LS32 provides four independent 2-input OR gates with standard push-pull

74LS323 3-Stage 8-Bit Universal Shift/Storage Register IC (74323) DIP-20 Package

41.30
The 74LS323 is an 8-Bit Universal Shift/Storage Register with 3-state outputs. Its function is similar to the 74LS299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are multiplexed to minimize pin count. Separate inputs and outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. Four operation modes are possible: hold (store), shift left, shift right, and parallel load. All modes are activated on the LOW-to-HIGH transition of the Clock.

74LS323 IC – (SMD Package) 3-Stage 8-Bit Universal Shift/Storage Register IC (74323 IC)

64.90
The 74LS323 is an 8-Bit Universal Shift/Storage Register with 3-state outputs. Its function is similar to the 74LS299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are multiplexed to minimize pin count. Separate inputs and outputs are provided for flip-flops Q0 and Q7 to allow easy cascading. Four operation modes are possible: hold (store), shift left, shift right, and parallel load. All modes are activated on the LOW-to-HIGH transition of the Clock.

74LS352 Dual 4-input Multiplexer IC (74352) DIP-16 Package

41.30
Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections

74LS352 IC – (SMD Package) Dual 4-input Multiplexer IC (74352 IC)

64.90
Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR-invert gates. Separate strobe inputs are provided for each of the two four-line sections

74LS365 3-State Hex Buffers IC (74365) DIP-16 Package

34.22
This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned OFF presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.

74LS365 IC – (SMD Package) 3-State Hex Buffers IC (74365 IC)

41.30
This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with additional drive capability to permit the driving of bus lines without external resistors. When disabled, both the output transistors are turned OFF presenting a high-impedance state to the bus line. Thus the output will act neither as a significant load nor as a driver. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the disable time is shorter than the enable time of the outputs.