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This device contains two independent gates each of which performs the logic NAND function.

The 74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly. Each segment output is guaranteed to sink 24 mA in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 ?A. Auxiliary inputs provided blanking, lamp test and cascadable zero-suppression functions.

The 74LS47 are Low Power Schottky BCD to 7-Segment Decoder/Drivers consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. They offer active LOW, high sink current outputs for driving indicators directly. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining NAND gate and three input buffers provide lamp test, blanking input/ripple-blanking output and ripple-blanking input. The circuits accept 4-bit binary-coded-decimal (BCD) and, depending on the state of the auxiliary inputs, decodes this data to drive a 7-segment display indicator. The relative positive-logic output levels, as well as conditions required at the auxiliary inputs, are shown in the truth tables. Output configurations of the 74LS47 are designed to withstand the relatively high voltages required for 7-segment indicators. These outputs will withstand 15 V with a maximum reverse current of 250 ?A. Indicator segments requiring up to 24 mA of current may be driven directly from the 74LS47 high performance output transistors. Display patterns for BCD input counts above nine are unique symbols to authenticate input conditions. The 74LS47 incorporates automatic leading and/or trailing-edge zero-blanking control (RBI and RBO). Lamp test (LT) may be performed at any time which the BI/RBO node is a HIGH level. This device also contains an overriding blanking input (BI) which can be used to control the lamp intensity by varying the frequency and duty cycle of the BI input signal or to inhibit the outputs. The following are the features:-

This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates.

74LS54 Quad 2-Input AND/OR Inverter Gate IC (7454) DIP-14 Package

The ?LS573 is a high speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. This device is functionally identical to the ?LS373, but has different pinouts.

The ?LS573 is a high speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. This device is functionally identical to the ?LS373, but has different pinouts.

The LS598 comes in a 20-pin package and has all the features of the LS597 plus 3-state 1/0 ports that pro vide parallel shift register outputs and also has multiplexed serial data inputs.