74HC73 Dual J-K Negative-Edge-Triggered Flip-Flops IC (7473) DIP-14 Package

The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable, one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC

SKU: RW-02650

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Description

The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable, one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC


Features :-

  • CMOS low-power dissipation
  • Wide supply voltage range from 2.0 to 6.0 V
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards
  •  JESD8C (2.7 V to 3.6 V)
  •  JESD7A (2.0 V to 6.0 V)
  • ESD protection:
  • HBM JESD22-A114F exceeds 2000 V
  •  MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 ?C to +80 ?C and from -40 ?C to +125 ?C


Specifications :-

Symbol  Parameter Min Type Max Unit
VCC Supply Voltage -0.5
+7 V
TA Ambient Temperature -40
+125 ?C

Output Current ? High

+25 mA

Output Current ? Low

50 mA



Package Includes :-

1 X 74HC73 Dual J-K Negative-Edge-Triggered Flip-Flops IC (7473) DIP-14 Package

Additional information

Operating voltage

2.5 3.0V

Pixel Resolution

0.3MP

Photosensitive array

640 x 480

Optical Size

1.6 inch

Angel of view

67 degrees

Maximum Frame Rate

30fps VGA

Sensitivity

1.3V/(Lux-sec)

Dormancy

Less than 20A

Power consumption

60mW/15fpsVGA YUV

Temperature operation Range

-30 C ~ 70 C

Pixel area

3.6 x 3.6 m

Signal to noise ratio (SNR)

46 dB

Dynamic range

52 dB

Specification

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