PIC16C63 Microcontroller
The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.
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Description
The PIC16C63A devices are low cost, high performance, CMOS, fully-static, 8-bit microcontrollers in the PIC16CXX mid-range family. All PIC? microcontrollers employ an advanced RISC architecture. The PIC16CXX microcontroller family has enhanced core features, eight-level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 35 instructions (reduced instruction set) are available. Additionally, a large register set gives some of the architectural innovations used to achieve a very high performance. The PIC16C63 devices have 22 I/O pins. Each device has 192 bytes of RAM. In addition, several peripheral features are available, including: three timer/ counters, two Capture/Compare/PWM modules, and two serial ports. The Synchronous Serial Port (SSP) can be configured as either a 3-wire Serial Peripheral Interface (SPI) or the two-wire Inter-Integrated Circuit (I2C) bus.
Features:-
? High performance RISC CPU
? Only 35 single word instructions to learn
? All single cycle instructions except for program branches which are two cycle
? Interrupt capability
? Eight-level deep hardware stack
? Direct, indirect and relative addressing modes
? Power-on Reset (POR)
? Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
? Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation
? Programmable code protection
? Power-saving SLEEP mode
? Selectable oscillator options
? Low power, high speed CMOS EPROM technology
Specification:-
| Parameter | Value |
| Program Memory Type | OTP |
| Program Memory Size (KB) | 7 |
| CPU Speed (MIPS/DMIPS) | 5 |
| SRAM (B) | 192 |
| Timers | 1 x 8-bit, 1×16 bit |
| Temperature Range (?C) | -40 to 85 |
| Operating Voltage Range (V) | 2.5 to 6 |
|
Pin Count
|
28 |
| Digital Communication Peripherals | 1-UART, |
| Capture/Compare/PWM Peripherals | 2 CCP, |
Related Document:-
Additional information
Operating voltage | 2.5 3.0V |
Pixel Resolution | 0.3MP |
Photosensitive array | 640 x 480 |
Optical Size | 1.6 inch |
Angel of view | 67 degrees |
Maximum Frame Rate | 30fps VGA |
Sensitivity | 1.3V/(Lux-sec) |
Dormancy | Less than 20A |
Power consumption | 60mW/15fpsVGA YUV |
Temperature operation Range | -30 C ~ 70 C |
Pixel area | 3.6 x 3.6 m |
Signal to noise ratio (SNR) | 46 dB |
Dynamic range | 52 dB |


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