Electronic Components

The LS598 comes in a 20-pin package and has all the features of the LS597 plus 3-state 1/0 ports that pro vide parallel shift register outputs and also has multiplexed serial data inputs.

The SN54L5670 and SN74LS670 MS1 16-bit TTL register film incorporate the equivalent of 98 gates. The register file is organized as 4 words of 4 bits each and separate on-chip decoding is provided for addressing the four word locations to either write-in or retrieve data. This permits simultaneous writing into one location and reading from another word location. Four data inputs are available which are used to supply the 4-bit word to be stored. Location of the word is determined by the write-address inputs A and B in conjunction with a write-enable signal. Data applied at the inputs should be in its true form That is, if a high-level signal is desired from the output, a high-level is applied at the data input for that particular bit location. The latch inputs are arranged so that new data will be accepted only if both internal address gate inputs are high. When this condition exists, data at the D input is transferred to the latch output. When the write-enable input, Ow, is high, the data in puts are inhibited and their levels can cause no change in the information stored in the internal latches. When the read-enable Input, Gn, is high, the data outputs are inhibited and go into the high-impedance stats