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CD4013 IC – (SMD Package) – Dual D Type Flip-Flop IC
The CD4013 dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and ?Q? and ?Q? outputs. These devices can be used for shift register applications, and by connecting ?Q? output to the data input, for counter and toggle applications. The logic level present at the ?D? input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively.
CD4015 Dual 4-Stage Shift Register IC DIP-16 Package
CD4015 consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015 package, or to more than 8 stages using additional CD4015?s is possible.
CD4016 Quad Bilateral Switch IC DIP-14 Package
CD4017 Decade Counter IC DIP-16 Package
The CD4017 is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The configuration of the CD4017 permits medium speed operation and assures a hazard free counting sequence. The 10/8 decoded outputs are normally in the logical ?0? state and go to the logical ?1? state only at their respective time slot. Each decoded output remains high for 1 full clock cycle. The carry-out signal completes a full cycle for every 10/8 clock input cycles and is used as a ripple carry signal to any succeeding stages.
CD4017 IC – (SMD Package) – Decade Counter IC
The CD4017 is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. These counters are cleared to their zero count by a logical ?1? on their reset line. These counters are advanced on the positive edge of the clock signal when the clock enable signal is in the logical ?0? state. The configuration of the CD4017 permits medium speed operation and assures a hazard free counting sequence. The 10/8 decoded outputs are normally in the logical ?0? state and go to the logical ?1? state only at their respective time slot. Each decoded output remains high for 1 full clock cycle. The carry-out signal completes a full cycle for every 10/8 clock input cycles and is used as a ripple carry signal to any succeeding stages.
CD40193 8-bit Up/Down Binary Counter IC DIP-16 Package
CD4020 14 Stage Ripple Carry Binary Counter IC DIP-16 Package
CD4020 is ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.
CD4022 Divide by 8 Counter/Divider IC DIP-16 Package
The CD4022 is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical ??1?? on their reset line. These counters are advanced on the positive edge of the clock signal when the clock enable signal is in the logical ??0?? state. The configuration of the CD4022 permits medium speed operation and assures a hazard free counting sequence. The 10/8 decoded outputs are normally in the logical ??0?? state and go to the logical ??1?? state only at their respective time slot. Each decoded output remains high for 1 full clock cycle. The carry-out signal completes a full cycle for every 10/8 clock input cycles and is used as a ripple carry signal to any succeeding stages.
CD4023 Triple 3-Input NAND Gate IC DIP-14 Package
CD4026 Decade Counter/Divider IC DIP-16 Package
CD4027 Dual JK Flip Flop IC DIP-16 Package
CD4027 is a single monolithic chip integrated circuit containing two identical complementary-symmetry J-K master-slave flip-flops. Each flip-flop has provisions for individual J, K, Set, Reset, and Clock input signals. Buffered Q and Q signals are provided as outputs. This input-ouput arrangement provides for compatible operation with the RCA-CD4013B dual D-type flip-flop.
CD4028 BCD to Decimal Decoder IC DIP-16 Package
CD4028 types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding-logic gates, and 10 output buffers. A BCD code applied to the four input, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = "0". High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications.
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